The present invention relates to an integrated semiconductor module having at least one terminal for connection to an external data bus, and a low-pass filter connected downstream of the terminal.
In order to enable communication between a plurality of integrated semiconductor modules (IC) or in order to drive an integrated semiconductor module, it is known to connect the plurality of the semiconductor modules or the plurality of the semiconductor modules and a drive unit to a common data bus via which the data traffic is effected. In so-called consumer ICs, which are used in objects of everyday life, such as domestic appliances or devices appertaining to entertainment electronics, the so-called Inter IC (IIC bus) has gained acceptance in recent years for data exchange between integrated semiconductor modules. The IIC bus enables standardized data traffic between the individual modules. Each of the modules is provided with a suitable interface circuit that supports the IIC protocol and handles the data traffic via the bus.
An important step in the fabrication of integrated semiconductor modules is that of testing the fabricated module IC to insure freedom from defects. In this case, as many settings as possible or all of the settings which are possible in the integrated circuit are performed and checked. The IC test should take as little time as possible. In order to be able to carry out tests on an IC, additional circuit measures are required in the IC. The outlay for these circuit measures should additionally be kept as low as possible, in other words the additional circuit measures, which are usually required only once during the life of the IC, should take up as little of the available chip area as possible.
Moreover, in the testing it is desirable to use only the IC terminal pins that are required anyway, and not to provide any additional terminal pins for test purposes.
The use of the IIC bus for performing settings on the IC during the test has been unfavorable heretofore because the bandwidth for the data exchange via the IIC bus is limited to 100 kHz or 400 kHz by means of a low-pass filter. This is used, during the later operation of the IC, to filter out high-frequency interference signals on the data bus which may occur for example when the IC is used in television sets.
It is accordingly an object of the invention to provide an integrated semiconductor module which overcomes the above-mentioned disadvantageous of the prior art apparatus of this general type. In particular, it is an object of the invention to provide such an integrated circuit module, which enables fast testing and requires little additional circuitry.
With the foregoing and other objects in view there is provided, in accordance with the invention, an integrated semiconductor module that is constructed for connection to a data bus. The integrated semiconductor module includes at least one terminal for connection to the data bus; a low-pass filter connected downstream of the terminal; and a circuit configuration for bridging the low-pass filter for test purposes.
In accordance with an added feature of the invention, the integrated semiconductor module is preferably constructed to operate when the data bus is an IIC bus. With the low-pass filter bridged, data can be fed to the semiconductor module for test purposes at a significantly higher clock rate than during normal operation of the IC. The bridging of the low-pass filter, which is otherwise present for reducing the susceptibility to interference, is completely harmless during the test since the testxe2x80x94unlike the later operation of the ICxe2x80x94can take place in a shielded environment. By virtue of the bridging of the low-pass filter, the settings and initializations required for test purposes can be performed within a short period of time on account of the high data rate that can be achieved, or required test patterns can be fed to the module at a high clock rate. The module can thus be tested in a short time.
Since the terminal pin that is present anyway for the data bus is used as the terminal for feeding in the test patterns at high clock rates, the circuitry outlay in the IC that is required for test purposes is low.
In accordance with an additional feature of the invention, the circuit arrangement for bridging the low-pass filter preferably has a demultiplexer and a multiplexer. The demultiplexer is connected upstream of the low-pass filter and the multiplexer is connected downstream of the low-pass filter. In this case, an input of the demultiplexer is preferably connected to the data bus and a first output of the demultiplexer is connected to an input of the low-pass filter. Furthermore, an output of the low-pass filter is connected to a first input of the multiplexer. A second input of the multiplexer, for bridging the low-pass filter, is connected to a second output of the demultiplexer.
In accordance with another feature of the invention, the semiconductor module has a controller circuit which supports testing of the module. The controller circuit assigns functions to the terminal pins of the IC during the test which serve exclusively for test purposes and differ from the functions during normal operation. Thus, by way of example, the values of internal registers or internal clock signals can be output via the terminal pins during the test in order to check whether the respective registers or clock generators function correctly. Such a controller circuit for testing the module is, for example, a TAP controller (TAP=Test Access Port) standardized according to IEEE 1149.1.
accordance a concomitant feature of the invention, the multiplexer and demultiplexer can be driven by the controller circuit in order to bridge the low-pass filter for test purposes.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in an integrated semiconductor module with bridgeable input low-pass filter, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.